Evaluations of No-Flow Fluxing Underfills with BGA, CSP, and Flip Chip on Board Assemblies

Category: Flip Chip and Die Placement
Post Date: July 19, 2004
Author(s): Tony DeBarros and Doug Katze, Emerson and Cuming; and Pericles Kondos, Surface Mount Laboratory, Universal Instruments

Description
If No-Flow Fluxing Underfills (NFFUF) are to be suitable for high volume electronic manufacturing, they must demonstrate high reliability on a variety of assembly configurations under various assembly processes. Some basic work regarding processing conditions such as dispensed volume and placement force, speed, and dwell time has already been published. The purpose of this paper is to examine additional assembly configurations to include higher IO counts up to full area arrays in excess of 1200 IO's. The primary land surface utilized in these experiments is OSP coated copper. However, other surface finishes will also be discussed.

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