Mechanical Reliability of Underfilled CSP Assemblies

Category: Chip Scale Package (CSP)
Post Date: July 20, 2004
Author(s): Murtuza Rampurawala, Arun Gowda and K. Srihari, Ph.D., Electronics Manufacturing Research and Services, State University of New York, Binghamton; and Michael Meilunas, Universal Instruments Corporation, Binghamton, New York

Description
Chip Scale Packages (CSPs) are widely used in portable and hand-held electronic devices. They offer robust interconnects and higher standoffs than flip chips. The reliability of CSPs in portable devices is questionable due to the mechanical stresses experienced during their service lifetime. The stresses are primarily generated due to impact, shock, vibration, mechanical bending, and thermally induced fatigue due to CTE (Coefficient of Thermal Expansion) mismatch between the CSP and the Printed Circuit board (PCB). Applying an underfill material between the CSP and PCB can significantly reduce these stresses. The underfill reduces the shear strain due to CTE mismatch and absorbs stresses by coupling the device and the PCB. This paper presents a study of different CSP underfill materials and their effect on the reliability of the CSP assemblies.

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